1. Field of the Invention
This invention generally relates to a PLL (phase-locked loop) circuit, and more particularly to an improvement in the PLL circuit which is capable of generating a continuous-wave signal having regular periods from a discontinuous input signal having irregular periods and yet capable of being manufactured at a reasonable cost.
2. Description of the Prior Art
As widely known, a PLL circuit is used to generate a signal synchronized with a reference input signal and having a frequency integral multiple of that of the reference input signal. The known PLL circuit, generally, has an arrangement, for example, as illustrated in FIG. 1. In the figure, 1 is an input terminal, 2 is a voltage-controlled oscillator, 3 is a frequency divider, 4 is a phase comparator, 5 is a low pass filter and 6 is an output terminal. A reference input signal supplied to the input terminal 1 is provided to one input of the phase comparator 4 and an output from the frequency divider 3 is provided to another input of the phase comparator 4. The frequency divider 3 divides a frequency of an output signal from the voltage-controlled oscillator 2 into an integral submultiple of the signal.
The phase comparator 4 generates an output voltage proportional to a phase difference between the two signals provided to the phase comparator 4. This voltage is applied to a control terminal of the voltage-controlled oscillator 2. The phase comparator 4 operates to control an oscillation frequency of the voltage-controlled oscillator so as to reduce the phase difference between the two signals provided to the comparator 4 when the phase difference is increased. Therefore, the PLL circuit of FIG. 1 keeps a constant phase difference and is held in equilibrium, so that a signal in synchronism with the reference input signal and having a frequency integral multiple of the frequency of the input signal can be obtained at the output terminal 6.
As can be noted, the conventional PLL circuit has such a disadvantage that it possibly malfunctions when a noise interferes with the reference input signal or the period of the reference input singal is not continuous.
By this reason, a circuit as illustrated in FIG. 2 has been proposed to generate a signal of regular period from a signal of discontinuous period. In the figure, 8 is a monostable-multivibrator having no re-triggerable function. A signal supplied to an input terminal 7 triggers the monostable multivibrator 8 and an output appears during a time constant determined by a resistor 10 and a capacitor 11. Therefore, when the time constant is selected to be somewhat shorter than the period of the reference input signal, the monostable multivibrator 8 is not triggered upon application of an input to the input terminal 7 during a time when the multivibrator 8 produces its output. Thus, a signal having a desired period can be obtained.
However, in this circuit, the pulse duration of the output from the monostable mulitvibrator is unstable due to a change with temperature or age, and it is difficult to maintain the stability for a long time. Although a counter may be employed to obtain a stable output pulse duration, it necessitates employment of an oscillator which is highly stable but expensive and renders the formation of the circuit complicated and the cost for manufacturing the same increased.